The purpose of this lab is to design and implement a traffic light controller for a single intersection.
The controller is constructed from a finite state machine used to control the actual operation of the traffic lights. The remainder of the system consists of supporting subsystems, including RAM, a Timer, Divider, and various synchronizers. Time values used by the finite state machine are written to and read from the RAM. The design used VHDL code compiled to a Cypress 374i CPLD and various digital hardware parts from the 6.111 Kit.
This traffic light controller also has provision for a walk light and for a vehicle sensor in one of the streets. Normally the side street has a shorter green interval than the main street, but if there is traffic on the side street when the controller is about to cycle to turn that green light off, it will extend the green light by the shorter (side street) green interval. Thus the green light on the side
street will stay on until traffic on the side street clears. The purpose of this feature is to allow one time traffic jams; from say a movie letting out, to clear more easily.
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