Introduction
Scan design, the ubiquitous design-for-test technology, is based on a relatively simple concept: One or more scan chains are constructed on a chip by serially tying together a set of internal registers and lip-lops.
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The scan chains are then connected to external chip pins or to the serial JTAG boundary-scan interface. During testing, test stimuli are scanned in through the scan input pins, and the test responses in the internal registers are scanned out through the scan output pins.
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