Abstract— Radiation induced soft errors in combinational
logic is expected to become as important as directly induced
errors on memory elements. Recent works have looked at
modeling and estimating soft errors in logic circuits.
Increased power consumption with very dense circuits has led
to large number of hot spots in present day ICs. Voltage
scaling is one of the popular techniques used for power
reduction in circuits. This work presents the results from a
study of effects of both increased temperature and voltage
scaling on electrical masking effect in logic circuits.
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